Design & Reuse
Catalog of SIP Cores
System on Chip design resources
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321 IP
251
0.0
DDR5 Memory PHY for Samsung at 9.6Gbps
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...
252
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DDR5 Memory PHY for Samsung Automotive
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...
253
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DDR5 Memory PHY for Samsung Automotive at 5.6Gbps
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...
254
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DDR5 Memory PHY for Samsung Automotive at 6.4Gbps
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...
255
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DDR5 Memory PHY for Samsung SF5A Automotive
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5 PH...
256
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DDR5 Memory PHY for TSMC at 4.8Gbps
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...
257
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DDR5 Memory PHY for TSMC at 4.8Gbps
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...
258
0.0
DDR5 Memory PHY for TSMC at 5.6Gbps
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...
259
0.0
DDR5 Memory PHY for TSMC at 6.4+Gbps
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...
260
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DDR5 Memory PHY for TSMC at 9.6Gbps
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...
261
0.0
DDR5 Memory PHY for TSMC N3P
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5 PH...
262
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DDR5 Memory PHY for TSMC N4P
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5 PH...
263
0.0
DDR5 Memory PHY for TSMC N5P
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5 PH...
264
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DDR5 Memory PHY for UMC at 6.4+Gbps
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...
265
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DDR5 MRDIMM for Intel
Lowest latency and highest data rates for data-intensive applications Cadence Design IP solutions offer world-class DDR PHY and controller memory I...
266
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DDR5 MRDIMM for TSMC
Lowest latency and highest data rates for data-intensive applications Cadence Design IP solutions offer world-class DDR PHY and controller memory I...
267
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DDR5 MRDIMM2 PHY in Samsung (SF2P)
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
268
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DDR5 MRDIMM3 PHY in TSMC (N2P)
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
269
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DDR5 PHY for SS SF4X
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
270
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DDR5 REGISTERING CLOCK DRIVER (RCD) IP - DDR5RCD03
The DDR5RCD03 is a registering clock driver used on DDR5 RDIMMs and LRDIMMs. Its primary function is to buffer the Command/Address (CA) bus, chip sele...
271
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DDR5/4 COMBO PHY 7nm/6nm
The DDR5/4 Combo PHY is designed for easy integration into any System-On-Chip (SOC) and can be seamlessly connected with a third-party DFI-compliant D...
272
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DDR5/4 COMBO PHY U22
The DDR5/4 Combo PHY is designed for easy integration into any System-On-Chip (SOC) and can be seamlessly connected with a third-party DFI-compliant D...
273
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DDR5/4 Memory PHY for Samsung SF5A Automotive
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5/4 ...
274
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DDR5/4 Memory PHY for TSMC 16nm
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5/4 ...
275
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DDR5/4 Memory PHY for TSMC N7
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5/4 ...
276
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DDR5/4 PHY for Samsung 7LPP
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5/4 ...
277
0.0
DDR5/4/LPDDR5/4X PHY for TSMC for N5P
Lowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry-leading domain expertise and ext...
278
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DDR5/DDR4/LPDDR5 Combo PHY IP - 4800Mbps (Silicon Proven in TSMC 12FFC)
The DDR PHY IP supports DDR5/ DDR4/ LPDDR5, provides low latency, and enables up to 5400MT/s throughput. PHY functionality is verified in NC-Verilog s...
279
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High Bandwidth Memory (HBM2E) HBM2E PHY for Global Foundries
Optimized for high bandwidth and low latency, the HBM2E PHY delivers maximum performance and flexibility in a compact form factor. HBM is a high-pe...
280
0.0
High Performance DDR 3/2 Memory Controller IP
This memory controller supports DDR2/3 SDRAM. DDR2/3 memory controller is a high-speed interface used for data read/write between internal engine and ...
281
0.0
Single-port 16/32/64-bit DDR266 Controller
The Single-port 16/32/64 bit DDR266 controller IP core is a DDR266 SDRAM controller AMBA AHB back-end. The controller can interface two 16-, 32- or 64...
282
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Controller for DDR
LPDDR5/4X/4/3 and DDR5/4/3L/3, to 6400Mbps and beyond The Cadence Denali Controller IP for LPDDR5/4X/4/3 and DDR5/4/3L/3 provides low latency and u...
283
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Controller for GDDR6
GDDR6 devices to 16Gbps, 18Gbps, 20Gbps, and beyond The latest, the Cadence Denali Controller IP for GDDR6, provides low latency and very high band...
284
0.0
Up to 50% main memory bandwidth acceleration
The Ziptilion Bandwidth IP accelertes the main memory bandwidth with up to 50%. The IP core packages a novel and proprietary technology that accelerat...
285
0.0
LPDDR Controller for LPDDR5X, LPDDR5 and LPDDR4X
Synopsys LPDDR5X/5/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5X,...
286
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LPDDR Controller IP
LPDDR is full-featured, easy-to-use, synthesizable design, compatible with JESD209A-1 and JESD209B specification. Through its LPDDR compatibility, it ...
287
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LPDDR2 Controller IP
LPDDR2 interface provides full support for the LPDDR2 interface, compatible with JESD209-2E and JESD209-2F specification. Through its LPDDR2 compatibi...
288
0.0
LPDDR3 Controller IP
SmartDV’s LPDDR3 Controller IP offers a high-performance and low-latency solution for integrating LPDDR3 memory interfaces into SoCs and FPGA-based sy...
289
0.0
LPDDR4 Controller IP
SmartDV’s LPDDR4 Controller IP is a high-performance solution designed to enable fast, power-efficient memory access in mobile, automotive, and high-p...
290
0.0
LPDDR4 multiPHY V2 in UMC (28nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...
291
0.0
LPDDR4/ DDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)
The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps. The PHY IP is silicon validated in the TSMC 28HPC+ ...
292
0.0
LPDDR4X / LPDDR4 Controller
The Rambus LPDDR4X/4 controller core is designed for use in applications requiring high memory throughput at low power including mobile, Internet of ...
293
0.0
LPDDR4X/4/3/DDR4 PHY for TSMC
Lowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry-leading domain expertise and ext...
294
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LPDDR4X/4/3/DDR4 PHY for TSMC 12nm and 16nm
Lowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry-leading domain expertise and ext...
295
0.0
LPDDR4X/4/3/DDR4 PHY for UMC
Lowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry-leading domain expertise and ext...
296
0.0
LPDDR4X/4/3/DDR4/3/3L PHY + Controller
INNOSILICON™ LPDDR4X/4/3/DDR4/3/3L Combo IP is a customizable Mixed-Signal DDR memory interface suite. The Combo IP provides turnkey physical interfac...
297
0.0
LPDDR5 Controller IP
SmartDV’s LPDDR5 Controller IP delivers high-bandwidth, low-latency memory access optimized for next-generation mobile, automotive, and AI/ML applicat...
298
0.0
LPDDR5/4/4X Controller with Inline Memory Encryption (IME) Security Module
SynopsysLPDDR5/4/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5, LP...
299
0.0
LPDDR5/4X COMBO PHY 7nm/6nm
The LPDDR5 and LPDDR4x Combo PHY is designed for easy integration into any System-On-Chip (SOC) and can be seamlessly connected with a third-party DFI...
300
0.0
LPDDR5/4X PHY IP for TSMC
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...